1. Field of the Invention
The present invention relates to the clock division of an optical signal.
2. Related Art
The need to derive a signal at a divided-down clock rate arises in a variety of contexts. For example, where a TDM (time division multiplexed) optical signal stream is used for communicating data, then a clock signal at less than the full bit rate of the data stream may be needed in the operation of a demultiplexer to select one or more time channels. Hitherto, when clock division has been required, this has commonly been carried out by tapping off part of the optical signal stream, detecting the signal to produce a corresponding timing wave in the electrical domain, and then dividing down the clock rate using conventional electronic clock-division circuits. With such an approach, before further optical processing can be carried out, a local optical source controlled by the electrical clock signal has to be used to take the divided signal back into the optical domain. Not only does this add undesirably to the cost and complexity of the relevant circuits, but the need for processing in the electrical domain severely limits the bit rates at which the circuit is capable of operating.
The paper by Lucek and Smith, IEEE PHOTONICS TECHNOLOGY LETTERS, January 1995, vol 7, no. 1, pp 1041-1135, discloses a remotely programmable routing device which may be used to provide a clock division function. While this has the advantage of being an all-optical device, it requires a relatively complex structure involving two stages. Data is first input to an ultra-fast gate stage where certain channels are selected. The non-linear element in the ultra-fast gate is a length of dispersion-shifted fibre. The output of the gate, which is a data signal containing the selected channels only, is then passed through a second stage comprising a mode-locked erbium laser. The effect of driving the laser with data channels is to produce a clock pattern with a xe2x80x9c1xe2x80x9d in each of the active channel timeslots, and a xe2x80x9c0xe2x80x9d elsewhere. The data signal passes on to an output port. The clock pattern, which may have a different bit pattern and is at a different wavelength to the data signal, is fed back as a control signal to the ultra-fast gate.
According to a first aspect of the present invention, there is provided a method of deriving a clock signal at a divided clock rate from an optical signal stream at a higher clock rate, comprising:
a) applying an optical signal stream to an all-optical non-linear gate, which gate includes a non-linear element;
b) feeding back an optical signal from an output of the said all-optical non-linear gate to the said non-linear element; and
c) outputting an optical signal at a divided clock rate from the all-optical non-linear gate.
The present invention adopts an approach to clock-division which allows the function to be carried out entirely in the optical domain, using a relatively simple method which is well-adapted for implementation using integrated fabrication and which overcomes the disadvantages of the prior art circuits discussed above. An all-optical non-linear gate is used. Optical feedback is provided from the output of the gate to a control input of a non-linear element. With the gate configured in this manner, it is found that when an optical signal stream is applied at its input, then a signal at a divided clock rate is present at the output of the gate.
Preferably the optical signal stream is applied to an interferometric non-linear optical gate. This gate may comprise a non-linear loop mirror (NOLM) and more preferably an NOLM incorporating a semiconductor optical amplifier as its non-linear element. Alternatively other interferometric structures, such as a Mach Zehnder interferometer, may be used.
While the use of other types of optical gate is possible, the present inventors have found it to be particularly advantageous to use a non-linear interferometer, and particularly an NOLM in a TOAD (TeraHertz Optically Asymmetric Demultiplexer) configuration with a semiconductor optical amplifier (SOA) as the phase switching element. Such a device has the advantages of low switching energy and is capable of operating rates approaching 100 GHz. Moreover, specifically in relation to clock division, the use of a TOAD configuration has the further important advantage that the total delay time over the feedback path can be made as short as the bit period, even when the bit period may be as little as a few 10""s of picoseconds. A further advantage of this preferred configuration is that the dynamics of the SOA support the clock division function.
Preferably the delay period associated with the optical feedback path is equal to the period between bits in the optical signal stream.
When the circuit is constructed to satisfy this constraint on the length of the delay over the optical feedback path, then in response to an input stream of the form xe2x80x9c11111111xe2x80x9d, the output from the gate is in the form xe2x80x9c10101010xe2x80x9d.
Alternatively, where the total length of the delay is greater than the period between consecutive bits in the optical signal stream, then the method may include an initial phase of programming the gate to carry out clock division by inputting to the gate a block of pulses having a predetermined bit-pattern and of sufficient length to fill both the gate and the feedback path.
As a further alternative, the circuit may include an SOA having a response time such that the circuit exhibits spontaneous clock division. In this case the method includes inducing spontaneous clock division in the non-linear gate by driving the semiconductor optical amplifier with the optical signal stream at a bit rate generally corresponding to the exe2x88x921 recovery rate of the semiconductor optical amplifier.
The clock division circuit may comprise a plurality of stages each with its own respective non-linear gate, n such stages being cascaded in series to provide an output divided by 2n.
According to a second aspect of the present invention, there is provided a clock division circuit comprising:
a) an all-optical non-linear gate including,
an optical input arranged to receive an optical signal stream at a higher clock rate,
an optical output,
a non-linear element connected between the optical input and the optical output; and
b) an optical feedback path from the output of the gate to the non-linear element,
in use an optical signal at a divided clock rate being output from the gate.
The present invention also encompasses a multiplexer or demultiplexer incorporating a clock division circuit in accordance with one or more of the preceding aspects of the invention.